ESL - Electronic System Level
ESL (Electronic System Level) is emerging methodology on the market. This methodology should rise abstraction level for the design entry tools and speed up development and verification processes. It should also solve various difficulties with design and verification of the largest digital designs, which frequently contains embedded microprocessors. The designs with embedded microprocessors are often named SoC (System On Chip) designs. The SoC designs incorporates big digital logic circuits and powerful microprocessors which execute sophisticated programs sometimes under control of real time operating system. ESL should solve SoC design and verification difficulties and several other problems. The following issues should be addressed in ESL methodology:
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Product architecture and specification development. Specifications should be developed faster and preferably in an executable form allowing architecture exploration.
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Replacing RTL languages with more abstract description. Behavioral synthesis tools should allow C/C++ or other abstract languages to be synthesized into gates.
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SoC development and verification. ESL should allow hardware-software co-design. It means that hardware and software parts of a SoC design should be developed concurrently. Traditional flow requires serial hardware and software development.
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Verification. ESL should simplify and speed-up verification process of the largest designs.
EDA vendors provide many different tools, which allegedly support ESL methodology. Engineers are confused hearing different stories about ESL from EDA vendors. It happens because each vendor addresses only one of the above mentioned issues. The tools sometimes support only several specific operations and cover only partially selected ESL area. Different tools must be used together to cover entire design flow or to move forward with our design. The tools available on the market can be divided into six groups:
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Algorithmic design.
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Architecture and specification design.
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Hardware/Software co-design and application partitioning between HW/SW.
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Virtual hardware platforms for software testing.
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Behavioral synthesis
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Verification
Most EDA vendors want to provide seamless environment for hardware and software co-design. C/C++ language is used to develop both hardware and software in such tools. However, C/C++ language does not support concurrent statements needed to describe hardware. EDA vendors solve this issue in several different ways. SystemC is frequently used for hardware modeling. SystemC is a library of C/C++ classes and macros, which allow modeling concurrent processes and signals.
Other tools are synthesizing C/C++ code into a state machine described in RTL code. The state machine performs sequentially the same operations, which ware originally written in C/C++ code. The synthesis tools provide optimizations capabilities for detecting blocks of C/C++ code, which can be executed concurrently. After optimization, several concurrent state machines can be created from sequential description in C/C++ language.
Other vendors simply extend the C/C++ language with constructs needed for hardware modeling. In such case proprietary language is created, which may not work well with standard C/C++ compilers.
For hardware designers the most interesting seems to be ESL solution from Bluespec. Bluspec provides behavioral synthesis tool for SystemVerilog. The language is extended with some additional constructs for behavioral modeling. The extended language is named Bluspec SystemVerilog. The behavioral description in Bluspec SystemVerilog is synthesized into RTL code. Blucspec claims that their behavioral synthesis solution allows two times faster designing comparing to traditional RTL techniques.
It is worth mentioning that popular MatlabTM from Mathworks also belongs to ESL tools. It is commonly used for algorithms modeling. However, several tool are available on the market for generating FPGA implementation from an algorithm described in MatlabTM or rather from SimulinkTM diagram. The tools are frequently used by DSP (Digital Signal Processing) engineers.
Experts are expecting breakthrough on ESL market in 2008 year. The best tools will probably strengthen their position on the market but the others may disappear. It is worth observing how EDA vendors compete to provide next generation tools for both hardware and software development.
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